SEMIFIVE locked a $52M Spec Hand-off AI chip. Tape-out waits until 2027.

Custom inference silicon is moving earlier in the design chain — before the customer finishes the chip.

SEMIFIVE announced Tuesday a contract worth about $52 million (KRW 70.3 billion) with a U.S. AI fabless company to develop a next-generation inference accelerator under its Spec Hand-off model — the customer supplies performance requirements, and SEMIFIVE owns detailed design through mass production. It is the firm's first North America Spec Hand-off and its largest single contract to date, representing more than 40% of 2025 orders and about 60% of first-half 2026 new orders, per the company's PR Newswire release. The chip targets LPDDR6, PCIe Gen5, and big-die architectures; tape-out is aimed at the first half of 2027, with global mass production beginning in 2028 for hyperscalers and cloud providers.

Watch which U.S. fabless and CSP inference programs lock Spec Hand-off partners into 2027 tape-outs — and who is still waiting on merchant GPU allocation instead.

Read the SEMIFIVE Spec Hand-off release →

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Who benefits if Spec Hand-off becomes the North America pattern: full-stack ASIC partners that can take requirements earlier than a classic turnkey handoff, and U.S. fabless inference programs that want dated silicon without waiting on merchant GPU and HBM leftovers. Who is exposed: GPU-only capacity narratives that miss the custom-silicon queue into 2027–28, and design houses still waiting for customers to finish RTL before they engage. What could prove this wrong? The unnamed U.S. customer slips tape-out, or Broadcom/Marvell-class hyperscaler ASIC programs absorb the inference demand that SEMIFIVE is chasing. Watch for named CSP design wins after the 1H 2027 tape-out window — that is when a $52M development contract becomes a production allocation story.

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The AI trade is not only who gets the GPU. It is who gets a dated custom inference die when the GPU queue is full.

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